A plasma processing may be performed on a target object such as a wafer by using a plasma processing apparatus. A plasma etching is one kind of such a plasma processing. The plasma etching is performed to transcribe a pattern of a mask formed on an etching target layer to the etching target layer. Generally, the mask is implemented by a resist mask. The resist mask is formed by a photolithography technique. Thus, a limit size of the pattern formed on the etching target layer depends on a resolution of the resist mask formed by the photolithography technique.
As a demand for high integration of electronic devices is getting higher, it is required to form the pattern smaller than the resolution limit of the resist mask. However, there is a limit in the resolution of the resist mask. Thus, as described in Patent Document 1, there is proposed a technique of adjusting a size of the resist mask and reducing a width of an opening provided in the resist mask by forming a silicon oxide film on the resist mask.
Patent Document 1: Japanese Patent Laid-open Publication No. 2004-080033
Meanwhile, as the electronic devices are miniaturized to meet the recent trend of the high integration, it is required to control a critical dimension (CD) with high accuracy when forming the pattern on the target object. Further, it may also be required to form various shapes of patterns.
As stated above, with regard to the pattern formation on the target object, it is required to develop a technique capable of coping with formation of various shapes of patterns as well as miniaturization of the patterns to meet the recent trend of high integration.